Logic simulation engines in Japan
Shigeru Takasaki, Fumiyasu Hirose, Akihisa Yamada · IEEE Design & Test of Computers · 1989
A description is given of HAL II and SP, ultra-high-speed logic simulation engines for use in verifying large computer logic designs. Both use parallel processor architecture with a maximum configuration of 64 processors. The resulting simulation speed is a thousand times faster than that of conventional software logic simulators run on a mainframe. HAL II and SP, which can simulate a system with several million gates, have been used successfully in the design of large digital systems for logic simulation.>