Research and design of reconfigurable 64-bit ALU
Hong Xia, Jingping Jia, Shanshan Wei · 2011
The logic design of ALU, an important constituent part of CPU, is described in this paper. The application of the reconfigurable technology restructures the 8-bit, 16-bit, 32-bit arithmetic and logic operation, performs the arithmetic and logic operation simultaneously, and supports SIMD instructions. This design reduces the size of project effectively, accordingly improves the performance of the ALU. The adder in this design effectively combines the design idea of two-bit-in-one-group and conditional sum, and takes the optimization measures of Manchester carry chain and carry lookahead adder, which makes the basic addition unit increased in speed, reduced in size, and meanwhile lowered in power consumption. The length of the critical path in this design is 13-level logic gates. A simulation of this design has been completed, using the standard SMIC 0.18 µm library, and the anticipative performance index has been achieved.