Run-time power-down strategies for real-time SDRAM memory controllers
Karthik Chandrasekar, Benny Åkesson, Kees G. W. Goossens · 2012
Powering down SDRAMs at run-time reduces memory energy consumption significantly, but often at the cost of performance. If employed speculatively with real-time memory controllers, power-down mechanisms could impact both the guaranteed bandwidth and the memory latency bounds. This calls for power-down strategies that can hide or bound the performance loss, making run-time memory power-down feasible for real-time applications.