A VLSI processor array for graph isomorphism
Danilo Demarchi, Guido Masera, Gianluca Piccinini · International Journal of Electronics · 1994
Complex images represented through relational graphs can be recognized finding the isomorphic graph in a database of stored images. In this paper, the basic node of a processor array able promptly to verify the graph isomorphism is described. The internal architecture has been tuned on the algorithm behaviour and a first prototype containing four processors has been realized in the frame of the Eurochip program, using ES2 1-5 urn technology, while a successive version in ST 0-8 urn technology is currently being developed.