The scan-DFT features of AMD's next-generation microprocessor core
Mahmut Yilmaz, Baosheng Wang, Jayalakshmi Rajaraman, Tom Olsen, Kanwaldeep Sobti, Dwight Elvey, Jeff Fitzgerald, Grady Giles, Wei-Yu Chen · 2010
There is an ever-increasing demand for higher performance microprocessors within a given power budget. This demand forces design choices - that were once seen only in high-speed custom blocks - to spread throughout the microprocessor core. These unique design structures, combined with the nanometer technology test challenges such as crosstalk, process variations, power-supply noise, and resistive short and open defects, lead to unique test challenges for today's high-performance microprocessor core. In this paper, we present the scan architecture-related design-for-test (DFT) features and corresponding verification strategies of the nextgeneration Advanced Micro Devices (AMD) high-performance microprocessor core.