A Note on Three-Valued Logic Simulation
Melvin A. Breuer · IEEE Transactions on Computers · 1972
In this note we discuss a few attributes and pitfalls of three-valued (0, 1, u) digital logic simulation. The areas covered include hazard and race detection, fault detection, verifying the reset logic of a machine, and the problems encountered with self-timing circuits and in employing a complement for u.