Silicon feedback to improve frequency of high-performance microprocessors: an overview
Chandramouli V. Kashyap, Pouria Bastani, Kip Killpack, Chirayu S. Amin · International Conference on Computer Aided Design · 2008
In modern high-performance microprocessors designed using advanced process technologies, the frequency of the part is often slower than what the static timing analysis tools predict before tape out. We give an overview of techniques used to observe the failing path on the tester, identify the dominant devices impacting the delay of the path, and learn from the failing path to fix other similar paths in the design. In particular, we describe a support vector machine based approach for learning from speedpaths observed in silicon.