SARC Coherence: Scaling Directory Cache Coherence in Performance and Power
Stefanos Kaxiras, Γεώργιος Κεραμίδας · IEEE Micro · 2010
The SARC project seeks to improve power scalability of shared-memory chip multiprocessors (CMPs) by making directory coherence more efficient in both power and performance. The authors describe how they eliminate two major sources of inefficiency for directory coherence protocols: invalidation traffic on writes and directory indirection for finding the writer.