On the design of fault diagnostic networks for combinational logic circuits
A. PALIT, Aakash Gupta, M. S. BASU, Avik Kumar Choudhury · International Journal of Electronics · 1975
The paper describes an easy method for the detection and location of all single faults of the stuck-at-zero and stuck-at-onc type in a combinational network. It is shown that the test inputs can be applied in sequence to identify some of the faulty lines whose diagnosis is otherwise ambiguous. The faults on the rest of the network lines are diagnosed with an additional combinational network, which is virtually faultless. The design procedure for this cost-oriented additional logic block is discussed. An algorithm is included for the diagnosis of fault ab initio.