Implications of hierarchical N-body methods for multiprocessor architecture
JASWINDER PAL SINGH · 1992
We first examine the key architectural implications of realistically scaling a representative member of this important class of applications. Using scaling methods that reflect the concerns of an application scientist leads to different conclusions than does naive scaling model, both the communication to computation ratio and the amount of cache memory per processor required for effective performance increase with scaling. We then examine the effect of a shared address space versus message passing as the communication abstraction. We show that the lack of a shared address space substantially increases the programming complexity and performance overheads of a message-passing implementation.