A 23K gate CMOS DSP with 100ns multiplication
Hiroaki Kikuchi, Takumi Inaba, Y. Kubono, H. Hambe, T. Ikesawa · 1983
A PROGRAMMABLE SINGLE-CHIP 23K gate Digital Signal Processor (DSP), affording loons 16b by 16b multiplication and flexible memory operation, will be described. The processor integrates 91,000 transistors and has been fabricated by using double aluminum-layer 2.3μ gate length Si gate CMOS technology. A hierarchical design methodology based on a standard cell approach was applied for this logic VLSI development.