Efficient Sequential Architecture for the AES CCM Mode in the 802.16e Standard
Jae Deok Ji, Seok Won Jung, Eun-A Jun, Jongim Lim · 2009
We propose hardware architecture of the advanced encryption standard counter with the cipher block chaining-message authentication code (AES CCM) in the 802.16e standard. It has only one AES encryption core with composite field logic for SBOX. The logic is divided into two parts to perform one round at two clock cycles. In the proposed architecture, the counter (CTR) and the cipher block chaining-message authentication code (CBC-MAC) operations are processed in a sequential mode and share one AES encryption resource at the same time. The throughput of our design is about 588 Mbps at 105 MHz frequency with reasonable area requirements.