Uniform modular realization of sequential machines
Edward P. Hsieh, Chenqing Tan, Monroe Newborn · 1968
Several researchers have investigated the problem of using a finite set of sequential modules to realize a given synchronous Moore machine.1,2,3 It has been shown that there does not exist either a single module or a finite set of modules that is logically complete for synchronous sequential machine design.3 That is, no finite number of identical copies of one module or finite set of modules can be used to realize with unit delay any arbitrary synchronous sequential machine. However, it has been shown that for every integer n, a finite number of identical copies of one module is sufficient to realize every n-input synchronous machine.2,3 It is the purpose of this paper to investigate this form of machine realization for both synchronous and asynchronous machines.