Hw acceleration for FPGA-based drive controllers
Slim Ben Othman, Ahmed Karim Ben Salem, Slim Ben Saoud · 2010
FPGA circuits serve as a powerful platform for prototype embedded system design, supporting easy integration and implementation of one or more processors, peripherals and data processing logic in a single configurable chip. In spite of the advantages that FPGAs brings to the implementation of digital controllers, this technology remains often deferred by the control engineer. However, software to hardware tools help engineers to overcome the lack of expertise in digital Hw design. In this paper, we present a new design approach of FPGA based controller for electromechanical systems. In the presented solution, a full speed RT motor control drive algorithm is implemented by using hardcore MPSoC (MultiProcessor System on Chip) architecture including specific Hw accelerator. We explore and evaluate the efficiency of using a C-to-FPGA tool flow, ImpulseC, to design a Hw current PI controller coprocessor. Test and validation of this controller system is performed by RT motor emulator implemented on the same FPGA. Advantages of the proposed controller design are discussed through simulation and synthesis results, by comparing to full Sw MPSOC design solution.