Improving the Cell Characteristics Using Low-k Gate Spacer in 1Gb NAND Flash Memory
Daewoong Kang, Sungnam Jang, Kyongjoo Lee, Jinjoo Kim, Hyukje Kwon, Won-Seong Lee, Byung‐Gook Park, Jong Duk Lee, Hyungcheol Shin · 2006
Floating gate interference resulting from capacitive coupling through parasitic capacitors surrounding the floating gate degrades the cell characteristics such as current, speed and cell Vthdistribution. For the first time, we have introduced the cell characteristics improved using low-k dielectric of gate spacer such as oxide and air gap in 1Gb NAND flash memory