Fail-safe synchronization of redundant microprocessor control systems
David Haberman · 1982
This paper presents a design solution to the problem of how to maintain synchronization between redundant microprocessor control systems controlling a fully automated transit passenger vehicle. This design allows redundant systems to make sequential calculations and perform disparity checking on each other's data in a close coupled synchronized manner. Also, the integrity of certain calculations using sensor input data often requires the clock frequency to be maintained within a close tolerance of its specified frequency for accurate calculations. This system detects frequency out-of-tolerance conditions and hardware failures in the timing and checking circuits and initiates a safe response when they occur.