High-performance 3D median filter architecture for medical image despeckling
Richard Jiang, Danny Crookes · Electronics Letters · 2006
A high-sample rate 3D median filtering processor architecture is proposed, based on a novel 3D median filtering algorithm, that can reduce the computing complexity in comparison with the traditional bubble sorting algorithm. A 3×3×3 filter processor is implemented in VHDL, and the simulation verifies that the processor can process a 128×128×96 MRI image in 0.03 seconds while running at 50 MHz.