High-level implementation of an ARM7 microprocessor with multicore capabilities
M.E. Domingo, N. Azucena, Cifuentes Castro, T.J. Herber, B. Pajarillo, M. Visaya, Anastacia P. Ballesil, Joy Alinda Reyes, John Richard E. Hizon · 2007
This paper presents an implemention of an ARM7 microprocessor with multicore capabilities. The required modifications to support multiprocessing include: the addition of atomic instructions to the instruction set and the addition of a bus interface. The implementation resulted to a 170% power overhead and a decrease in area by 61% compared with the single core implementation of the ARM7 microprocessor in the laboratory. The maximum allowable frequency attained was 17 MHz, an improvement from the previous implementation's 10 MHz.