On choosing a hardware description language for digital systems testing/verification
Bulent I. Dervisoglu · International Test Conference · 1984
Hardware Description Languages have been around for quite sometime. Whereas originally such languages have been intended primarily for use in automatic SYNTHESIS of digital systems, today they serve to provide a formal description of a target system so that several different forms of ANALYSIS can be performed. Among the analysis tasks are those concerning testing and verification. Existing and proposed testing/verification techniques require knowledge of the inherent properties of the portions of the target system. Thus, HDLs should be developed and/or used to express such properties clearly and explicitly. Failure to do so requires the testing/verification algorithms to perform deductive work to discover important generic properties, a feat which is not easily accomplished.