Guaranteeing packet order in IBWR optical packet switches with parallel iterative schedulers
M. Rodelgo‐Lacruz, Pablo Pavón‐Mariño, Francisco Javier González-Castaño, Joan Garcı́a-Haro, Cristina López‐Bravo, J. Veiga‐Gonátn, Felipe Gil‐Castiñeira, Carla Raffaelli · European Transactions on Telecommunications · 2009
Abstract The input‐buffered wavelength‐routed (IBWR) switch is a scalable switch fabric for optical packet switching (OPS) networks. In synchronous operation, when optical packets are of a fixed duration and aligned at switch inputs, the scheduling of this architecture can be characterised by a type of bipartite graph matching problem. This challenges the design of feasible algorithms in terms of implementation complexity and response time. A previous work presented and evaluated the insistent parallel desynchronized block matching (I‐PDBM) algorithm for the IBWR switch. I‐PDBM is a parallel iterative scheduler with a good performance and a simple hardware implementation. However, the algorithm does not maintain the packet sequence. In this paper, we present the I‐PDBM algorithm with packet ordering (OI‐PDBM), which prevents mis‐sequencing and behaves as I‐PDBM in terms of delay, buffer requirements and convergence speed. Copyright © 2009 John Wiley & Sons, Ltd.