Generating compilers for generated datapaths
M. Held, Manfred Glesner · 1994
Modern CAD systems allow the designers to come up with powerful programmable datapaths in a very short time. The time to develop compilers for this datapaths is much longer. This paper presents a new approach to compiler generation. We show how a VHDL description of a pro-grammable datapath can be analyzed to extract several informations for compiler generation. The analysis finds computing and storage resources, classifies signals as con-trol or data, and extracts all the possible micro operations for this datapath. 1