The pringle parallel computer
Alejandro A. Kapauan, J. Timothy Field, Dennis B. Gannon, Lawrence Snyder · ACM SIGARCH Computer Architecture News · 1984
The Pringle is a 64 processor MIMD computer with a 64 M (8 bit) instructions per second execution rate. (Copies are running at Purdue and Washington.) The Pringle runs programs written for the Configurable, Highly Parallel (CHiP) Computer. That is, the Pringle executes the 64 separate instruction streams as well as the interconnection (phase) stream that configures the lattice of a 64 processor CHiP computer. But the Pringle is not a CHiP. It gives the illusion of the CHiP machine's conflict-free, point-to-point communication using a 64 Mbit internal polled bus. In addition to describing the design goals and the Pringle architecture, this paper identifies two problems common to novel architecture implementation projects, the “wisdom of experience” problem and the “single instance” problem, and expalins how they were addressed for the Pringle.