Testability-Driven Random Test-Pattern Generation
R. Lisanke, F. Brglez, A.J. de Geus, D.L. Gregory · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1987
This paper presents ESPRIT, an automatic test pattern generation (ATPG) system for testing single stuck-at faults in combinational logic. ESPRIT generates test patterns by performing fault simulation on random patterns derived from nonuniformly distributed input signal probabilities. The system computes input signal probabilities that minimize a testability cost function. Using ESPRIT, we have observed orders-of-magnitude reduction in the number of random trials required to obtain a given fault coverage.