Ultra‐low‐cost colour demosaicking VLSI design for real‐time video applications
Shih‐Lun Chen, Huan‐Rui Chang, Ting‐Lan Lin · Electronics Letters · 2014
A novel low‐complexity and high‐quality colour demosaicking algorithm is proposed for very large‐scale integration (VLSI) implementation for real‐time video applications. It consists of a boundary detector, a boundary mirror model and five green and red–blue colour interpolation models. Two of the five interpolation models can be selected adaptively according to boundary and position information. In addition, a boundary mirror machine and identical direction technique were used to improve the qualities of the reconstructed images. To reduce the hardware cost, memory requirement and power consumption, a hardware‐sharing technique and register bank design were used to realise the proposed algorithm. The VLSI architecture of this work contains only 2.9 K gate counts and its core area is 35 966 μm 2 synthesised by a 0.18 μm CMOS process. The synthesised results show that this design performs an operating frequency of 100 MHz processing rate by consuming only 1.83 mW. Compared with the previous low‐complexity designs, this work not only reduces at least 48.2% of gate counts and 96.7% of power consumption but also improves the average CPSNR quality by more than 0.78 dB.