Single-board computer design for improved testability with signature analysis
C.C. Lefas · International Journal of Electronics · 1985
The paper describes several design considerations for single-board computers for improved field testability using signature analysis. It is shown that fault detection to major component level can be achieved by using signature analysers sampling the address and data bus of the unit under test. The signature analysers are synchronized to sample the buses during selected machine cycles only, so that the signatures taken characterize the operation of only one component. An example is given for implementation on Z80-based single-board computers.