Integration of TTA processor tools to Kactus2 IP-XACT design flow
Lauri Matilainen, Sakari Lahti, Otto Esko, Erno Salminen, Timo D. Hämäläinen · 2012
This paper presents a new freely available, open source design flow to accelerate the usage of application-specific processors in System-on-Chip designs. The proposed flow combines our Transport-Triggered Architecture (TTA) processor toolset and Kactus2 IP-XACT design environment. The IP-XACT standard and our Kactus2 tool make it easy to integrate and configure intellectual property (IP) components from multiple vendors whereas the configurable TTA provides a fast and efficient path from C-to-VHDL. We present 3 use cases for TTA: as a ready-made fixed accelerator, a general-purpose processor, and a tailored application-specific processor. Moreover, management of instance-specific data in IP-XACT is discussed. The combined design flow is presented in detail step-by-step, and the user time spent on each step is evaluated. Provided that C source codes and IP-XACT library are available, a non-HW oriented engineer can implement an FPGA based multiprocessor product in less than 5 hours.