SLS - A Fast Switch Level Simulator for Verification and Fault Coverage Analysis
Z. Barzilai, D.K. Beece, Leendert M. Huisman, V. Iyengar, Gabriel M. Silberman · Design Automation Conference · 1986
We describe SLS, a large capacity, high performance switch level simulator, developed to run on an IBM System/370 architecture, that uses a model which closely reflects the behavior of MOS circuits. This performance is the result of mixing a compiled model with the more traditional approach of event-driven simulation control, together with very efficient algorithms for evaluating the steady state response of the circuit. SLS is used for design verification/checking applications and for estimating fault coverage.