The Dawn of Predictive Chip Yield Design: Along and Beyond the Memory Lane
Rajiv Joshi, Rouwaida N. Kanj, Antonio Pelella, Arthur tuminaro, Y.H. Chan · IEEE Design & Test of Computers · 2010
Editor's note:Statistical approaches for yield estimation and robust design are vital in the current variation-dominated design era. This article presents a mixture importance sampling methodology to enable yield-driven design and extends its application beyond memories to peripheral circuits and logic blocks.—Rahul Rao, IBM