A communication structure for a multiprocessor computer with distributed global memory
Lars Philipson, Bo Nilsson, Björn Breidegard · 1983
An experimental multiprocessor computer was designed and built in order to explore the feasibility of certain internal communication mechanisms. The system consisted of seven processing elements, each containing a part of the global memory connected to a local bus. For each processor the global memory is seen as one single, linearly addressable structure. The processing elements were all connected to a common, global bus, consisting of three separate busses in order to increase the capacity. A bus selection unit was designed, capable of making a unique bus selection for each request, within a fraction of a memory cycle. The experiments have shown that communication structures based on distributed global memory and global bus systems can be used efficiently for medium scale systems.