Mapping data flow programs on a VLSI array of processors
Bilha Mendelson, Gabriel M. Silberman · 1987
With the advent of VLSI, relatively large processing arrays may be realized in a single VLSI chip. Such regularly structured arrays take considerably less time to design and test, and fault-tolerance can easily be introduced into them. However, only a few computational algorithms which can effectively use such regular arrays have been developed so far.