High‐performance VLSI architecture suitable for control systems for state‐space digital filters using distributed arithmetic
Yoshitaka Tsunekawa, Mamoru Miura · Electronics and Communications in Japan (Part III Fundamental Electronic Science) · 1995
Abstract This paper proposes and evaluates high‐performance VLSI architecture for real‐time state‐space digital filters used in digital signal processing and digital control. A VLSI‐oriented highly parallel architecture for state‐space digital filters with high sampling rate and small latency has already been proposed by the authors. To speed up and reduce hardware complexity, the distributed arithmetic (of which processing time depends on only, word length) is applied to this architecture, making good use of highly accurate state‐space digital filters. The very high sampling rate can be implemented independently of filter order and the number of the input and output.