Graphical $I_{\rm DDQ}$ Signatures Reduce Defect Level and Yield Loss
Lan Rao, M.L. Bushnell, Vishwani D. Agrawal · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2007
We propose a new IDDQtesting signature, the graphical IDDQsignature. We discovered that noise, in the entire set of current measurements for a chip, is a vastly superior feature for classifying chips as good or bad, compared to present methods. The measured IDDQcurrent as a function of vectors is defined here as the signature. We examine the shape of the waveform defined by the total set of the IDDQmeasurements, to extract the number of bands that all of the current measurements cluster into, the width and separation of the bands and current glitches or noise among all IDDQmeasurements. We examined the IDDQsignatures of all SEMATECH experiment chips that were classified as good or bad by a combination of functional, delay, and scan voltage tests. A single IDDQthreshold, whether absolute or differential, cannot separate good/bad chips reliably. Good chip signatures contain discrete levels (or bands) of varying widths and separations. A faulty chip almost always displays noise and glitches in the band structure. The graphical IDDQclassifier shows very high accuracy for SEMATECH test data with a test escape rate of 5.97%, compared with 7.5% for the single threshold method, 7.6% for current differences and 7.5% for the DeltaIDDQmethod. The graphical IDDQmethod had a 1.2% test overkill, compared with 2.3% for the single threshold method, 6.1% for current differences and 7.0% for DeltaIDDQ.