Associative RAM-net memory neural target classifier
Devinder Kaur, D. L. Brownell · Optical Engineering · 1998
We propose a broad-based target classifier that recognizes a target on the principle of pattern matching based on associative memory, and can be implemented in hardware with standard complementary metal-oxide semiconductor (CMOS) cells. A major drawback in the field of neural networks is the inability to implement network designs in hard- ware inexpensively. Here we have designed an associative RAM-net memory neural classifier, which is based on the associative memory model of a winner-take-all classifier. In this model extensive use of ordi- nary random access memory is made. The benefit of this approach is that the entire architecture can be designed with current CMOS standard cells application-specific integrated circuit (ASIC) technologies as op- posed to current analog very large scale integration (VLSI) approaches. Since RAM can be easily added using the standard cell ASIC approach, a low-cost implementation for a wide variety of neural classification prob- lems is provided. The integration of all necessary features on a single chip results in an easily implementable, low-chip-count classification sys- tem. A full gate-level design of the architecture is created and simulated using the VHDL hardware programming language (Navabi, 1993; Mentor Graphics, 1992). The results are very encouraging, and warrant further research into various memory types and configurations. © 1998 Society of Photo-Optical Instrumentation Engineers. (S0091-3286(98)00507-8) Subject terms: target classifier; neural networks; associative memory; RAM-net memory.