Implementation of Nonlinear Template Runner Emulated Digital CNN-UM on FPGA
Zoltán Kincses, Zoltán Nagy, P. Szolgay · 2006
In the original CNN paradigm template values are defined as constants but several complex tasks can be efficiently solved by using nonlinear weights between the CNN cells. Unfortunately programmable nonlinear weights can not be implemented by using present day analog VLSI technology. In this paper a new emulated digital CNN-UM architecture will be presented which makes it possible to use zero and first order nonlinear templates during emulation. The new architecture is based on the Falcon emulated digital CNN-UM architecture and implemented on FPGAs. The computing precision of the architecture is configurable and the area/speed/accuracy tradeoffs are investigated