A specialized computer architecture for high-speed text searching
David C. Roberts · ACM SIGIR Forum · 1976
This paper describes a specialized parallel computer architecture that is proposed for high-speed searching of large text data bases. The proposed machine architecture is a parallel array of independent processors connected to a common bus. Each processor consists of a microprocessor, a high-speed block-access memory for storage of a part of the data base, read-only memory for control software, and random-access memory for storage of programs and working storage. The processors are connected by a common high-speed bus that is used for communication of data, programs, commands and results. The benefits claimed for this architecture are design simplicity, high speed for suitable applications, ease of software development, reliability and reasonable cost. This machine architecture is under consideration as a means for providing high-speed text searching capabilities.