A two-stage pipelined architecture for parallel modular exponentiation
Tao Wu, Shuguo Li, Litian Liu · 2012
In 1998, Koç and Hung proposed a modular multiplication algorithm with carry save additions, in which a sign-detection method in carry save logic is utilized. In this work, the carry save additions in their algorithm are divided into two pipelined stages, so that Montgomery ladder can be used to interleave two nearby modular multiplications. Efficient full modular exponentiation can be performed in such an architecture.