A Reconfigurable High Speed Architecture Design for Discrete Hilbert Transform
P. Sreenivasa Reddy, Suresh Mopuri, Amit Acharyya · IEEE Signal Processing Letters · 2014
This letter proposes a high-speed and reconfigurable Discrete Hilbert Transform architecture design methodology targeting the real-time applications including Cyber-Physical systems, Internet of Things or Remote Health-Monitoring where the same chip-set needs to be used for various purposes under real-time scenario. By using this architecture we are able to get Discrete Hilbert Transform for any given M-point by re-using N-point Discrete Hilbert Transform as a kernel. Here N and M are multiple of 4 and N respectively. Subsequently we provide the architecture design details and compare the proposed architecture with the conventional state-of-the-art architecture. Thorough theoretical analysis and experimental comparison results show that the proposed design is twice as fast and reconfigurability is also achieved simultaneously.