Circuitry for artificial neural networks with non-volatile analog memories
Randy L. Shimabukuro, Patrick A. Shoemaker, M.E. Stewart · 2003
The design and fabrication of a nonvolatile MOS analog memory (MAM) cell, which is a critical component for the implementation of a neural network chip, is reported. Incorporated in the memory is a novel four-quadrant multiplier which allows either positive or negative stored values and combines the readout with a multiplication with the input signal. Background on artificial neural networks is briefly given, along with a description of how the properties of the memory cell fit in with an integrated circuit implementation. Modified learning algorithms that have been tailored toward VLSI implementation are discussed.>