Accelerated sensitizable path algorithms for timing verification based on code generation
Luc Claesen, Jürgen Schupp, H. De Man · 2003
A method is proposed that is based on a preprocessing of the constrained event graph into an event graph without logical constraints. From the resulting unconstrained event graph, code can be generated that can be evaluated in linear time with respect to the number of event vertices in the graph. The computer implementations of the new algorithms have been tested on real MOS LSI modules and are compared to existing (interpretative) algorithms for false path elimination. Evaluation speedups of up to three orders of magnitude have been achieved for complex time-optimized circuits.>