Structured design-for-debug-the SuperSPARC II methodology and implementation
Hong Hao, R. Avra · 2002
This paper describes a structured design-for-debug methodology that provides observability throughout an entire chip. It makes use of existing design-for-testability (DFT) features on the chip and is part of the overall DFT strategy. The implementation of the methodology on the SuperSPARC II microprocessor is described. This methodology has been instrumental in the successful silicon debug and timely shipment of the chip.