Efficient implementation of the integer lifting transform for video compression on FPGA
Carl James Debono, Keith Izzo · International Symposium ELMAR · 2013
In this paper, we present a very efficient hardware configuration for the Integer Lifting Transform (ILT), implemented as part of an object-based video compression system on a Field Programmable Gate Array (FPGA). This configuration requires very low resources and memory, yet it is still capable of working in a real-time manner, and can handle large video frame resolutions. The compression quality achieved by the ILT ranges between 22dB and 36dB for high and low frame motion respectively, with whole frames having an approximate quality of 26dB.