Clock generation & distribution for a 45nm, 8-core Xeon ® Processor with 24MB cache
Simon M. Tam, Justin Leung, Rahul Limaye · 2009
The clock generation and distribution system for a 8-core Xeon® MP processor with 2.3B transistors fabricated on a 45nm 9M CMOS process achieves 21ps clock skew in the un-core before engaging skew compensation and enables I/O link operations up to 6.4GT/s. The clocking system encompasses multiple clock and voltage domains and extensive global and local clock compensation capabilities.