The T9000 transputer
David L. May, Roger Shepherd, Peter W. Thompson · 2003
Some of the issues arising in the design of the T9000 transputer, which integrates a complete computer in a single VLSI chip of over two million transistors, are discussed. High performance has been achieved by extensive use of caching and a novel processor implementation. The processor uses a fat pipeline and dispatches several dependent instructions into the pipeline each cycle. The resulting processor is able to saturate a 25-MFLOP floating-point unit. The processor is supported by a communications system that supports communications at high speed and low latency.>