Mitigating hardware cyber-security risks in error correcting decoders
Saied Hemati · 2016
This paper investigates hardware cyber-security risks associated with channel decoders, which are commonly acquired as a black box in semiconductor industry. It is shown that channel decoders are potentially attractive targets for hardware cyber-security attacks and can be easily embedded with malicious blocks. Several attack scenarios are considered in this work and suitable methods for mitigating the risks are proposed. A homomorphic channel decoding is devised that obstructs the communications between attackers and the malicious blocks, ideally without changing the decoding performance.