Code optimization libraries for retargetable compilation for embedded digital signal processors
Sharad Malik, Ashok Sudarsanam · 1998
A common trend in the implementation of embedded DSP systems is the integration of one or more DSPs, program memory, and custom circuitry onto a single IC. Consequently, program memory size is limited, so the embedded software must be sufficiently dense. This software must also be written so as to meet various high-performance constraints. Unfortunately, existing compiler technology is unable to generate dense, high-performance code for DSPs since it does not provide adequate support for the specialized features of DSPs via machine-dependent optimizations. Thus, designers often program the embedded software in assembly, which is a very time-consuming task. In order to increase productivity, compilers must be developed that are capable of generating high-quality code for DSPs. Additionally, the compilation process must be made retargetable so that a variety of DSPs may be evaluated for potential use in an embedded system. This thesis focuses on retargetable compilation for embedded fixed-point DSPs with limited parallelism, which are typically used in audio rate digital signal processing. In addition to several machine-dependent optimizations, a retargetable compilation methodology is presented that enables high-quality code to be generated for a wide range of DSPs. Previous work in retargetable DSP compilation supports a limited number of machine-dependent optimizations. However, the proposed methodology, which is based on using a library of parameterized machine-dependent optimization algorithms, supports a wide variety of these optimizations. Experimental results demonstrate the effectiveness of this methodology, which has been used to build good-quality compilers for three fixed-point DSPs.