Hardware/software partitioning of embedded System-on-Chip applications
Jia Wei Tang, Yuan Wen Hau, Muhammad Nadzir Marsono · 2015
HW/SW partitioning is an important development step during HW/SW co-design to ensure application performance in embedded System-on-Chip (SoC). This paper formulates the optimization of HW/SW partitioning aiming at maximizing streaming throughput with predefined area constraint, targeted for multi-processor system with hardware accelerator sharing capability. Two software-oriented and the second hardware-oriented greedy heuristic algorithms for HW/SW partitioning are proposed and tested on several random graphs and one multimedia application (MP3 decoder). Results show that the best result from both proposed greedy algorithms produce 93.6% near-optimal solution compared to brute force ground truth with faster HW/SW partitioning time.