A Multi-thread Stream Processor with Variable-Length Instructions for High Performace 2D/3D Graphics
Hyung-Ki Jeong, Jae-Chang Kwak, Kwang-Yeob Lee · ITC-CSCC :International Technical Conference on Circuits Systems, Computers and Communications · 2007
We propose a high performance multi-thread processor for mobile devices to accelerate 3D/2D graphics. The proposed processor has variable length instructions which consist of 32bit unit-instructions up to 4 for maximum utilization of ALUs and minimum length of instrcution fields. The graphics processor supports the shader API Model 3.0 architecture based on the 8 threads pipeline.