General purpose simulated annealing on hardware
Jarkko T. Niittylahti, Harri Raittinen, Kimmo K. Kaski · 2005
A general purpose hardware for the Simulated Annealing optimization method has been designed and implemented. It is a digital stand-alone system that requires no host computer. The prototype design utilizes a full custom VLSI random number generator chip among standard digital circuits. Altera's reprogrammable FPGA technology is used to increase the packing density and to allow modifications. Thisfast optimization tool call be used to optimize any dynamically configurable hardware to adapt a given task. All application example and performance estimations are also presented.