VLSI processor architecture for real-time GA processing and PE-VLSI design
Tetsuya Imai, M. Yoshikawa, Hidekazu Terai, H. Yamauchi · 2004
This paper presents the VLSI processor architecture for real-time processing of genetic algorithm (GA). GA, which is widely known a general-purpose optimization method, has essential difficulties in its huge computation time and a premature convergence. As a new approach to these difficulties, it is introduced to implement distributed GA on VLSI multiprocessors (GA processor). VLSI implementation of a processor-element (PE) indicates that a PE can be 130 times faster than conventional software processing. Moreover, parallel computer simulation demonstrates that GA processor, which connects a suitable number of PE with a newly proposed hierarchical ring topology, can provide scalability according to a given problem.