An optimizing C compiler for the GMICRO/500 microprocessor
Yuichiro Kashiwagi, Yasuhiro Tawara, Hideaki Chaki, Koji Yamada, Masahiro Kainaga, Tadaaki Isobe · 2003
The GMICRO/500 is a superscalar microprocessor based on the TRON specification. An optimizing C compiler for the microprocessor is under development. The compiler implements both hardware-independent optimizations and GMICRO/500-specific optimizations with a performance target of 100 MIPS at 50 MHz. The hardware-independent optimizations gave a good basis for the effective improvement of hardware/software performance. On the other hand, GMICRO-specific optimizations was a challenging problem because of the complexity of the superscalar CISC architecture. The authors describe these optimization techniques with emphasis on the implementation strategy of the GMICRO/500-specific superscalar optimization.>